Datasheet Texas Instruments CD4020B — 数据表

制造商Texas Instruments
系列CD4020B
Datasheet Texas Instruments CD4020B

CMOS 14级纹波-Carry二进制计数器/除法器

数据表

CD4020B, CD4024B, CD4040B TYPES datasheet
PDF, 1.6 Mb, 修订版: D, 档案已发布: Dec 11, 2003
从文件中提取

价格

状态

89271AKB3TCD4020BECD4020BEE4CD4020BNSRCD4020BNSRG4CD4020BPWCD4020BPWE4CD4020BPWR
Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

打包

89271AKB3TCD4020BECD4020BEE4CD4020BNSRCD4020BNSRG4CD4020BPWCD4020BPWE4CD4020BPWR
N12345678
Pin1616161616161616
Package TypeWRNNNSNSPWPWPW
Industry STD TermPDIPPDIPSOPSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25252000200090902000
CarrierTUBETUBELARGE T&RLARGE T&RTUBETUBELARGE T&R
Device MarkingCD4020BECD4020BECD4020BCD4020BCM020BCM020BCM020B
Width (mm)6.356.355.35.34.44.44.4
Length (mm)19.319.310.310.3555
Thickness (mm)3.93.91.951.95111
Pitch (mm)2.542.541.271.270.650.650.65
Max Height (mm)5.085.08221.21.21.2
Mechanical Data下载下载下载下载下载下载下载

参数化

Parameters / Models89271AKB3T
89271AKB3T
CD4020BECD4020BEE4CD4020BNSRCD4020BNSRG4CD4020BPWCD4020BPWE4CD4020BPWR
Approx. Price (US$)0.11 | 1ku
Approx. price, US$0.11 | 1ku0.11 | 1ku0.11 | 1ku0.11 | 1ku0.11 | 1ku0.11 | 1ku0.11 | 1ku
Bits12121212121212
Bits(#)12
F @ Nom Voltage(Max)(Mhz)8
F @ nom voltage(Max), MHz8888888
FunctionCounterCounterCounterCounterCounterCounterCounterCounter
ICC @ Nom Voltage(Max)(mA)0.03
ICC @ nom voltage(Max), mA0.030.030.030.030.030.030.03
IOH(Max), mA-1.5-1.5-1.5-1.5-1.5-1.5-1.5
IOL(Max), mA1.51.51.51.51.51.51.5
Input TypeCMOS
Operating Temperature Range(C)-55 to 125
Operating temperature range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max)(mA)1.5/-1.5
Output TypeCMOS
Package GroupPDIP
SO
TSSOP
PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16PDIP|16,SO|16,TSSOP|16
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
Package size: mm2:W x L, PKGSee datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNo
Technology FamilyCD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000
TypeBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinary
VCC(Max), V18181818181818
VCC(Max)(V)18
VCC(Min), V3333333
VCC(Min)(V)3
Voltage(Nom), V5,10,155,10,155,10,155,10,155,10,155,10,155,10,15
Voltage(Nom)(V)5
10
15
tpd @ Nom Voltage(Max)(ns)160
tpd @ nom Voltage(Max), ns160160160160160160160

生态计划

89271AKB3TCD4020BECD4020BEE4CD4020BNSRCD4020BNSRG4CD4020BPWCD4020BPWE4CD4020BPWR
RoHSNot CompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYesNoYesYesYes

应用须知

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, 档案已发布: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, 档案已发布: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015

模型线

制造商分类

  • Semiconductors > Logic > Specialty logic > Counter/arithmetic/parity function