Datasheet Texas Instruments ADC08D1520QML-SP — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADC08D1520QML-SP |

8位,双1.5 GSPS或单3.0 GSPS,模数转换器(ADC)
数据表
ADC08D1520QML Low Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter datasheet
PDF, 1.2 Mb, 修订版: O, 档案已发布: Mar 19, 2013
从文件中提取
状态
| 5962F0721401VZC | ADC08D1520WGFQV | ADC08D1520WGMPR | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No |
打包
| 5962F0721401VZC | ADC08D1520WGFQV | ADC08D1520WGMPR | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 128 | 128 | 128 |
| Package Type | NBC | NBC | NBC |
| Industry STD Term | CFP | CFP | CFP |
| JEDEC Code | S-CQFP-G | S-CQFP-G | S-CQFP-G |
| Package QTY | 12 | 12 | 12 |
| Device Marking | 5962F0721401VZC Q | ADC08D1520WGFQV | ES |
| Width (mm) | 19.558 | 19.558 | 19.558 |
| Length (mm) | 19.558 | 19.558 | 19.558 |
| Thickness (mm) | 2.997 | 2.997 | 2.997 |
| Pitch (mm) | .508 | .508 | .508 |
| Max Height (mm) | 3.556 | 3.556 | 3.556 |
| Mechanical Data | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | 5962F0721401VZC![]() | ADC08D1520WGFQV![]() | ADC08D1520WGMPR![]() |
|---|---|---|---|
| # Input Channels | 2,1 | 2,1 | 2,1 |
| Analog Voltage AVDD(Max), V | 2.2 | 2.2 | 2.2 |
| Analog Voltage AVDD(Min), V | 1.8 | 1.8 | 1.8 |
| Architecture | Folding Interpolating | Folding Interpolating | Folding Interpolating |
| ENOB, Bits | 7.4 | 7.4 | 7.4 |
| INL(Max), +/-LSB | 6 | 6 | 6 |
| INL(Typ), +/-LSB | 0.3 | 0.3 | 0.3 |
| Interface | Parallel LVDS | Parallel LVDS | Parallel LVDS |
| Operating Temperature Range, C | -55 to 125,25 | -55 to 125,25 | -55 to 125,25 |
| Package Group | CFP | CFP | CFP |
| Package Size: mm2:W x L, PKG | See datasheet (CFP) | See datasheet (CFP) | See datasheet (CFP) |
| Power Consumption(Typ), mW | 2000 | 2000 | 2000 |
| Rating | Space | Space | Space |
| Reference Mode | Int | Int | Int |
| Resolution, Bits | 8 | 8 | 8 |
| SFDR, dB | 55.5 | 55.5 | 55.5 |
| SNR, dB | 47 | 47 | 47 |
| Sample Rate (max), SPS | 3GSPS | 3GSPS | 3GSPS |
生态计划
| 5962F0721401VZC | ADC08D1520WGFQV | ADC08D1520WGMPR | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
应用须知
- AN-1558 Clocking High-Speed A/D Converters (Rev. B)PDF, 1.2 Mb, 修订版: B, 档案已发布: May 1, 2013
Extremely high-speed ADCs (>1 GSPS) demand a low-jitter sample clock in order to preserve signal-tonoiseratio (SNR). These 8- and 10-bit converters have best-case noise floors set by quantization noise.For an N-bit ADC sampling a full-scale sinusoid, the well known expression for SNR (in dB) is: SNR =6.02N + 1.76. This sets the best case noise floor for an 8-bit ADC at в€’49.9 dBc. The noise f
模型线
系列: ADC08D1520QML-SP (3)
制造商分类
- Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters